VLSI Circuit Design II

Course Information

VLSI Circuit Design II is an engineering design course; thus, the emphasis on this course is on the design.

The course does not have a midterm or a final exam. The grades students receive in these course are a result of their project work, given by the instructor every two weeks. There is also one midterm and one final project, which require at least a month's work. An extensive report is expected for every project. Typically, projects require extensive literature search, system and circuit level analytical analysis, system simulations using MATLAB/Simulink and circuit level simulations using Cadence.

Apart from the regular class hours, students are expected to spend at least 8 hours (or more) a week to complete the course work, including their project reports. Also, while some projects are prepared individually, most of them are group projects; thus, it is very important to be able to work as a member of a project team.


Instructor Information

Assistant Prof. Dr. Sıddıka Berna Örs Yalçın


Course Materials


Course Database

The course database, where the students are expected to publish their reports for their projects reside on the ITU VLSI Webs. Please click here to proceed to the course database.